1. Field of the Invention
The present invention relates to a semiconductor device, and more particularly to a method of manufacturing a semiconductor device with the semiconductor substrate using an epitaxial growth film.
2. Description of the Related Art
Up to now, in all or a partial region of a semiconductor substrate using an epitaxial growth film, a buried layer is disposed under said epitaxial growth film. The buried layer is used for lowering a resistance of the device formed on the buried layer and also for improving a soft error and latch-up resistance.
Also, in the case where an IC using a bipolar device or a BiCMOS device is formed on the semiconductor substrate having the epitaxial growth film, the buried layer is brought into contact with an impurity diffused layer of the same conductivity as that of said buried layer formed on the epitaxial growth film to separate device elements.
FIG. 1 is a cross-sectional view showing a semiconductor substrate with a buried layer using an epitaxial growth film according to a conventional method of manufacturing a semiconductor device.
In FIG. 1, a silicon semiconductor substrate 101 is doped with impurities through an ion implantation method. A device element separation region is doped with impurities of the same conductivity as that of the silicon semiconductor substrate 101. Annealing is conducted in order to diffuse the impurities with which doping is made through the ion implantation method and to restore crystal defects introduced into the silicon semiconductor substrate 101 through the ion implantation method. After an epitaxial growth film 102 has been formed on the silicon semiconductor substrate 101 that has been annealed, the epitaxial growth film 102 is doped with impurities. The impurities with which the device element separation region is doped are of the same conductivity as that of the silicon semiconductor substrate 101 and a buried layer 103. The silicon semiconductor substrate 101 on which the epitaxial growth film 102 that is doped with the impurities is formed is annealed, to thereby thermally diffuse the impurities with which the epitaxial growth film 102 is doped and the buried layer 103, thus forming a diffusion layer 104 and the buried layer 103. In the device element separation region, the buried layer 103 and the diffusion layer 104 come in contact with each other, to thereby perform the electric separation of the device elements.
In the semiconductor device manufactured according to the above-described conventional manufacturing method, it is essential to conduct annealing in order to restore the crystal defects introduced into the surface of the semiconductor substrate which is caused by doping the semiconductor substrate with the impurities before the formation of the epitaxial growth film on the semiconductor substrate having the buried layer. Since the p-type conductive impurities make it more difficult to restore the crystal defects introduced into the semiconductor substrate than the n-type conductive impurities, the annealing conditions (temperature, a period of time) are determined according to the doping conditions (concentration, an energy and ion species) of the p-type conductive impurities. In the case where the annealing is conducted under the doping conditions of the p-type conductive impurities, there arises such a problem that it is difficult to reduce an IC chip area because the amount of thermal diffusion of the buried layer is large.
If the concentration of the p-type conductive impurities with which the semiconductor substrate is doped is lowered, it is possible to restrain the amount of diffusion of the buried layer because the quantity of annealing heat is lowered. However, the resistance is increased in the device regions, and the diffusion layer and the buried layer formed in the epitaxial growth layer become out of contact with each other in the device element separation region, resulting in such a problem that the device element separation is impossible.
If the concentration of the impurities with which the diffusion layer is doped is heightened, it is possible to restrain the high resistance of the device regions. However, this leads to such problems that the IC chip area increases, and also that the device characteristics are deteriorated by the high concentration of the impurities in the device region.
If the quantity of annealing heat for forming the diffusion layer and the buried layer is increased, it is possible to form the structure in which the device elements are electrically separated in the device element separation region. However, there arises such a problem that the IC chip area increases or the manufacturing costs increase as in the case where the concentration of the impurities with which the diffusion layer is doped.
Similarly, if the concentration of the impurities with which the device region and the device element separation region of the semiconductor substrate are doped is varied, it is possible to restrain the high resistance in the device region and to form the structure in which the device elements are electrically separated in the device element separation region. However, there arises such a problem that an increase of a masking process causes to increase the IC manufacturing costs.
The present invention has been made in view of the above circumstances, and therefore an object of the present invention is to provide a method of manufacturing a semiconductor device that makes it possible to reduce a period of time for manufacturing the semiconductor device more and to reduce the IC chip area more than the conventional method of manufacturing the semiconductor device in which the epitaxial growth film is formed on the semiconductor substrate having the buried layer.